The present invention relates generally to integrated circuit design and fabrication systems. More specifically, the invention relates to mechanisms for generating and inspecting reticles and other types of samples.
Generation of reticles and subsequent optical inspection of such reticles have become standard steps in the production of semiconductors. Initially, circuit designers provide circuit pattern data, which describes a particular integrated circuit (IC) design, to a reticle production system, or reticle writer. The circuit pattern data is typically in the form of a representational layout of the physical layers of the fabricated IC device. The representational layout typically includes a representational layer for each physical layer of the IC device (e.g., gate oxide, polysilicon, metallization, etc.), wherein each representational layer is composed of a plurality of polygons that define a layer's patterning of the particular IC device.
The reticle writer uses the circuit pattern data to write (e.g., typically, an electron beam writer or laser scanner is used to expose a reticle pattern) a plurality of reticles that will later be used to fabricate the particular IC design. A reticle inspection system may then inspect the reticle for defects that may have occurred during the production of the reticles.
A reticle or photomask is an optical element containing transparent and opaque, semi-transparent, and phase shifting regions which together define the pattern of coplanar features in an electronic device such as an integrated circuit. Reticles are used during photolithography to define specified regions of a semiconductor wafer for etching, ion implantation, or other fabrication process. For many modern integrated circuit designs, an optical reticle's features are between about 1 and about 10 times larger than the corresponding features on the wafer. For other exposure systems (e.g., x-ray, e-beam, and extreme ultraviolet), a similar range of reduction ratios also applies.
Optical reticles are typically made from a transparent medium such as a borosilicate glass or quartz plate on which is deposited an opaque and/or semi-opaque layer of chromium or other suitable material. However, other mask technologies are employed for direct e-beam exposure (e.g., stencil masks), x-ray exposure (e.g., absorber masks), etc. The reticle pattern may be created by a laser or an e-beam direct write technique, for example, both of which are widely used in the art.
After fabrication of each reticle or group of reticles, each reticle is typically inspected by illuminating it with light emanating from a controlled illuminator. An optical image of the reticle is constructed based on the portion of the light reflected, transmitted, or otherwise directed to a light sensor. Such inspection techniques and apparatus are well known in the art and are embodied in various commercial products such as many of those available from KLA-Tencor Corporation of San Jose, Calif.
During a conventional inspection process, the optical image of the reticle is typically compared to a baseline image. The baseline image is either generated from the circuit pattern data or from an adjacent die on the reticle itself. Either way, the optical image features are analyzed and compared with corresponding features of the baseline image. Each feature difference is then compared against at least one threshold value. If the optical image feature varies from the baseline feature by more than the predetermined threshold, a defect is defined.
Although conventional reticle inspections provide adequate levels of detection accuracy for some applications, other applications require a higher sensitivity or lower threshold value (for identifying defects) while other applications require less stringent, higher threshold levels. Also, particular structures on the reticle may require a first type of inspection algorithm, while other types of structures may require a different type of inspection algorithm.
For example, critical features of an integrated circuit typically include gate widths of the semiconductor transistor devices. That is, a gate width on the reticle needs to produce a corresponding gate width on the circuit pattern within a relatively small margin of error in order for the fabricated IC device to function properly. If the threshold is set too high, these critical gate areas are not checked adequately enough. Conversely, other features, such as the widths of the interconnections between gate areas, do not affect the function of the integrated circuit as much as the gate area width and, thus, do not need to be inspected as stringently as other features, such as gate width. If the threshold is set too low, too many of these noncritical features may be defined as defects such that the inspection results are difficult to interpret and/or computational resources are overloaded.
In sum, conventional techniques only use information available from geometry of single layer. Also, conventional inspection systems waste valuable resources by inspecting regions of the reticle too stringently, and not inspecting other regions stringently enough. In other words, the above described inspection system fails to reliably detect defects within critical areas and inefficiently inspects noncritical regions where somewhat larger defects will not present a problem. Conventional inspection systems and techniques are unable to distinguish between different types of features, such as critical and noncritical areas of the reticle. Put in another way, conventional design documentation (e.g., electronic reticle or integrated circuit information) fails to adequately transmit the IC designer's intent regarding the circuit tolerance and resulting IC device dimensions to reticle writer systems, reticle inspection systems, and ultimately wafer inspection systems.
What is needed is improved IC documentation and apparatus for more efficiently and reliably writing and inspecting reticles and wafers.